- Standard backside thinning
- Ultra-thin wafer grinding
- Frontside thinning
- Single-die and partial-wafer thinning
- Bumped-wafer thinning
- Bonded wafer thinning (including anodic bonded silicon-on-glass wafers)
- ...
Through our global network of testing experts and analytical equipment including chromatography (HPLC, GC, GC/MS) and atomic absorption spectroscopy (AAS, GFA, FIAS), Our goal is to provide test services as efficiently as possible to maximize our customers' profits. For more information about our services, contact one of our experts today.
Note: this service is for Research Use Only and Not intended for clinical use.

Wafer backgrinding, also known as wafer thinning, is an essential semiconductor fabrication step that enables ultra-thin device form factors and advanced packaging structures. The process reduces the thickness of processed wafers from their original bulk dimensions down to a target thickness suitable for next-generation applications such as 3D IC packaging, through-silicon via (TSV) devices, MEMS sensors, image sensors, RF chips, optical modules and power electronics. By carefully controlling material removal on the wafer backside—while protecting delicate front-side patterns—backgrinding helps improve heat dissipation, enhance electrical performance, and enable ultra-small electronic products. At Alfa Chemistry, we provide full-scope wafer backgrinding and post-processing services engineered for both high-volume production and R&D-level customization.

Our wafer backgrinding division is equipped with state-of-the-art tools and metrology systems, enabling consistent output across multiple substrates, diameters, and process complexities.
Substrate & Material Capability
We offer thinning for a wide breadth of wafer materials, including:
Dimensional Processing Capacity
Our backgrinding systems are engineered to meet various wafer sizes and thinning requirements:
| Capability Type | Specification |
| Supported Wafer Diameters | 4" (100 mm), 6" (150 mm), 8" (200 mm), 12" |
| Minimum Achievable Thickness | 4" wafers down to 25 μm (1 mil / 0.001") 8" wafers down to 50 μm (2 mils / 0.002") |
| Thickness Uniformity Tolerance | ≤ ±5 μm |
| Supported Processing Formats | Full wafers, partial wafers, single-die, bonded wafers, bumped wafers |
Thinning & Grinding Techniques
We deploy a full spectrum of thinning approaches to support diverse wafer materials and end-use performance goals:
| Types | Techniques |
| Mechanical Removal |
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| Chemical / Hybrid Removal |
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Final Backside Finishing Options
To ensure wafers meet packaging-grade quality standards, multiple finish levels are available:
| Finish Level | Surface Roughness Result |
| Ground Finish | ~25 μ" Ra |
| Stress-relief Polished Finish | < 250 Å |
| CMP Polished Finishes | 10 Å Ra, 7 Å Ra, < 5 Å Ra (premium ultra-smooth finish) |
In a semiconductor world striving for smaller, thinner, and faster devices, wafer backgrinding plays a pivotal enabling role. With advanced tools, broad substrate capability, and a service model built on engineering rigor, we ensure your wafers are not merely thinned—but transformed into mechanically robust, packaging-ready building blocks for next-generation electronics.
Partner with us to unlock the full potential of wafer-level manufacturing and shape the future of semiconductor technology.
Do not know how to place an order, please refer to the flow chart shown below.
Submit quotation request |
A technical manager will contact you within 24 hours |
You will review and approve the final price and place an order |
Confirm with you and make the payment |
Instruct you to ship your samples and form |
Analytic report delivery |